Noriyuki Ito
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
7
Venues
4
Active years
1990–2007
Best venue rank
A*
Where they publish
Papers
7 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2007 | ASPDAC | Design Methodology for 2.4GHz Dual-Core Microprocessor. | Noriyuki Ito, Hiroaki Komatsu, Akira Kanuma, Akihiro Yoshitake, Yoshiyasu Tanamura, Hiroyuki Sugiyama, Ryoichi Yamashita, Ken-ichi Nabeya, Hironobu Yoshino, Hitoshi Yamanaka, Masahiro Yanagida, Yoshitomo Ozeki, Kinya Ishizaka, Takeshi Kono, Yutaka Isoda |
| 2007 | ICCD | Fast power network analysis with multiple clock domains. | Wanping Zhang, Ling Zhang, Rui Shi, He Peng, Zhi Zhu, Lew Chua-Eoan, Rajeev Murgai, Toshiyuki Shibuya, Noriyuki Ito, Chung-Kuan Cheng |
| 2006 | ASPDAC | Delay defect screening for a 2.16GHz SPARC64 microprocessor. | Noriyuki Ito, Akira Kanuma, Daisuke Maruyama, Hitoshi Yamanaka, Tsuyoshi Mochizuki, Osamu Sugawara, Chihiro Endoh, Masahiro Yanagida, Takeshi Kono, Yutaka Isoda, Kazunobu Adachi, Takahisa Hiraide, Shigeru Nagasawa, Yaroku Sugiyama, Eizo Ninoi |
| 2006 | ASPDAC | Diagonal routing in high performance microprocessor design. | Noriyuki Ito, Hideaki Katagiri, Ryoichi Yamashita, Hiroshi Ikeda, Hiroyuki Sugiyama, Hiroaki Komatsu, Yoshiyasu Tanamura, Akihiro Yoshitake, Kazuhiro Nonomura, Kinya Ishizaka, Hiroaki Adachi, Yutaka Mori, Yutaka Isoda, Yaroku Sugiyama |
| 2004 | ICCAD | Detection of multiple transitions in delay fault test of SPARC64 microprocessor. | Daisuke Maruyama, Akira Kanuma, Takashi Mochiyama, Hiroaki Komatsu, Yaroku Sugiyama, Noriyuki Ito |
| 2003 | ICCD | A Physical Design Methodology for 1.3GHz SPARC64 Microprocessor. | Noriyuki Ito, Hiroaki Komatsu, Yoshiyasu Tanamura, Ryoichi Yamashita, Hiroyuki Sugiyama, Yaroku Sugiyama, Hirofumi Hamamura |
| 1990 | DAC | Automatic Incorporation of On-Chip Testability Circuits. | Noriyuki Ito |