P. Saenger
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
1
Venues
1
Active years
2018–2018
Best venue rank
C
Where they publish
Papers
1 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2018 | IECON | Hardware-In-the-Loop simulation of a DC-machine with INTEL FPGA boards. | P. Saenger, Mickal Hilairet |