| 2025 | DSD | An FPGA Architecture for Authentication and Key Agreement Protocol for 5G Networks. | Marios Papadopoulos, Kostas Lampropoulos, Paris Kitsos |
| 2024 | DSD | SAND5G - Security Assessments for Networks and Services in 5G Networks. | Aimilia Bantouna, Kostas Lampropoulos, Omar Qaise, Andreas Stamoulis, Paris Kitsos, Kostas Poulios, Lampros Raptis, Christos Tranoris |
| 2023 | DSD | FPGA-Based Encryption System for Cloud Security. | Marios Papadopoulos, Paris Kitsos |
| 2023 | ICST | Summary of Locating Hardware Trojans using Combinatorial Testing for Cryptographic Circuits. | Ludwig Kampel, Paris Kitsos, Dimitris E. Simos |
| 2021 | DSD | 5G Security: FPGA Implementation of SNOW-V Stream Cipher. | Lampros Pyrgas, Paris Kitsos |
| 2020 | DSD | Are ring oscillators without a combinatorial loop good enough for Hardware Trojan detection? | Lampros Pyrgas, Aliki Panagiotarou, Paris Kitsos |
| 2019 | DSD | DSD-i1: A Mixed Functionality Development Board Geared Towards Digital Systems Design Education. | Anastasios Fanariotis, Theofanis Orphanoudakis, Vasilios Fotopoulos, Paris Kitsos |
| 2019 | DSD | A Very Compact Architecture of CLEFIA Block Cipher for Secure IoT Systems. | Lampros Pyrgas, Paris Kitsos |
| 2018 | DSD | An FPGA Hardware Trojan Detection Approach Based on Multiple Parameter Analysis. | Apostolos P. Fournaris, Lampros Pyrgas, Paris Kitsos |
| 2017 | DSD | Run-Time Effect by Inserting Hardware Trojans, in Combinational Circuits. | Fotios Kounelis, Nicolas Sklavos, Paris Kitsos |
| 2017 | DSD | Thermal Sensor Based Hardware Trojan Detection in FPGAs. | Lampros Pyrgas, Filippos Pirpilidis, Aliki Panayiotarou, Paris Kitsos |
| 2016 | DDECS | Efficient triggering of Trojan hardware logic. | Artemios G. Voyiatzis, Kyriakos G. Stefanidis, Paris Kitsos |
| 2016 | DSD | TERO-Based Detection of Hardware Trojans on FPGA Implementation of the AES Algorithm. | Paris Kitsos, Kyriakos Stefanidis, Artemios G. Voyiatzis |
| 2015 | DSD | A Comparison of TERO and RO Timing Sensitivity for Hardware Trojan Detection Applications. | Paris Kitsos, Artemios G. Voyiatzis |
| 2015 | ISSRE | Exciting FPGA cryptographic Trojans using combinatorial testing. | Paris Kitsos, Dimitris E. Simos, Jose Torres-Jimenez, Artemios G. Voyiatzis |
| 2014 | DSD | FPGA Trojan Detection Using Length-Optimized Ring Oscillators. | Paris Kitsos, Artemios G. Voyiatzis |
| 2013 | DSD | An Efficient FPGA-Based Architecture of Skein for Simple Hashing and MAC Function. | Filippos Pirpilidis, Paris Kitsos, Nicolas Sklavos |
| 2012 | DSD | FPGA-based Design Approaches of Keccak Hash Function. | George Provelengios, Paris Kitsos, Nicolas Sklavos, Christos Koulamas |
| 2011 | DSD | An FPGA Implementation of the ZUC Stream Cipher. | Paris Kitsos, Nicolas Sklavos, Athanassios N. Skodras |
| 2011 | DSD | Low Power FPGA Implementations of JH and Fugue Hash Functions. | George Provelengios, Nikolaos S. Voros, Paris Kitsos |
| 2010 | DSD | Low Power FPGA Implementations of 256-bit Luffa Hash Function. | Paris Kitsos, Nicolas Sklavos, Athanassios N. Skodras |
| 2008 | DSD | A Hardware Implementation of CURUPIRA Block Cipher for Wireless Sensors. | Paris Kitsos, George N. Selimis, Odysseas G. Koufopavlou, Athanassios N. Skodras |
| 2005 | ISCAS | A RAM-based FPGA implementation of the 64-bit MISTY1 block cipher. | Paris Kitsos, Michalis D. Galanis, Odysseas G. Koufopavlou |
| 2004 | ISCAS | High-speed hardware implementations of the KASUMI block cipher. | Paris Kitsos, Michalis D. Galanis, Odysseas G. Koufopavlou |
| 2004 | ISCAS | Whirlpool hash function: architecture and VLSI implementation. | Paris Kitsos, Odysseas G. Koufopavlou |
| 2002 | ISCAS | Hardware implementation of the SAFER+ encryption algorithm for the Bluetooth system. | Paris Kitsos, Nicolas Sklavos, Odysseas G. Koufopavlou |
| 2002 | ISCAS | Random number generator architecture and VLSI implementation. | Nicolas Sklavos, Paris Kitsos, Kyriakos Papadomanolakis, Odysseas G. Koufopavlou |