Parisa Razaghi
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
4
Venues
3
Active years
2007–2012
Best venue rank
B
Where they publish
Papers
4 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2012 | ASPDAC | Abstract system-level models for early performance and power exploration. | Andreas Gerstlauer, Suhas Chakravarty, Manan Kathuria, Parisa Razaghi |
| 2012 | ASPDAC | Automatic timing granularity adjustment for host-compiled software simulation. | Parisa Razaghi, Andreas Gerstlauer |
| 2011 | DATE | Host-compiled multicore RTOS simulator for embedded real-time software development. | Parisa Razaghi, Andreas Gerstlauer |
| 2007 | FDL | A Configurable Transaction Level Model of a Generic Interconnection Part of Embedded Systems Used in an ESL Design Library. | Parisa Razaghi, Shahrzad Mirkhani, Zainalabedin Navabi |