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Paul Falkenstern

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

2

Venues

2

Active years

2007–2010

Best venue rank

B

Where they publish

Papers

2 indexed papers, newest first.

YearVenueTitleAuthors
2010ASPDACThree-dimensional integrated circuits (3D IC) floorplan and power/ground network co-synthesis.Paul Falkenstern, Yuan Xie, Yao-Wen Chang, Yu Wang
2007ICCDScan chain design for three-dimensional integrated circuits (3D ICs).Xiaoxia Wu, Paul Falkenstern, Yuan Xie