| 2014 | DAC | On Timing Closure: Buffer Insertion for Hold-Violation Removal. | Pei-Ci Wu, Martin D. F. Wong, Ivailo Nedelchev, Sarvesh Bhardwaj, Vidyamani Parkhe |
| 2014 | ICCAD | Fast path-based timing analysis for CPPR. | Tsung-Wei Huang, Pei-Ci Wu, Martin D. F. Wong |
| 2014 | ICCAD | UI-timer: an ultra-fast clock network pessimism removal algorithm. | Tsung-Wei Huang, Pei-Ci Wu, Martin D. F. Wong |
| 2013 | ASPDAC | An ILP-based automatic bus planner for dense PCBs. | Pei-Ci Wu, Qiang Ma, Martin D. F. Wong |
| 2013 | ASPDAC | Network flow modeling for escape routing on staggered pin arrays. | Pei-Ci Wu, Martin D. F. Wong |
| 2013 | ICCAD | Efficient aerial image simulation on multi-core SIMD CPU. | Pei-Ci Wu, Tan Yan, Hongbo Zhang, Martin D. F. Wong |
| 2010 | ICCAD | On the escape routing of differential pairs. | Tan Yan, Pei-Ci Wu, Qiang Ma, Martin D. F. Wong |
| 2008 | ASPDAC | A new global router for modern designs. | Jhih-Rong Gao, Pei-Ci Wu, Ting-Chi Wang |
| 2007 | ASPDAC | A Fast and Stable Algorithm for Obstacle-Avoiding Rectilinear Steiner Minimal Tree Construction. | Pei-Ci Wu, Jhih-Rong Gao, Ting-Chi Wang |