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Peter M. Kogge

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

36

Venues

18

Active years

1973–2025

Best venue rank

A*

Where they publish

Papers

36 indexed papers, newest first.

YearVenueTitleAuthors
2025HPDCBuilding Flexible Physics-Informed Neural Networks with Fast Fourier Transform Analysis.Reem Shehayib, Jayden Parker Vap, Peter M. Kogge
2025ICDMJORTs: Jenk's Optimization for Restrictive Training.Jay Vap, Reem Shehayib, Peter M. Kogge
2025QCEA Formalization of Measurement-Commuting Unitaries.Ulrik de Muelenaere, Sinan Pehlivanoglu, Amr Sabry, Peter M. Kogge
2024QCEScaling of Graph Embedding for Quantum Annealers.Ulrik de Muelenaere, Allison O'Brien, Kelly Williams, Peter M. Kogge
2021EuroParExploring Strategies to Improve Locality Across Many-Core Affinities.Neil Butcher, Peter M. Kogge
2020SCCache Oblivious Strategies to Exploit Multi-Level Memory on Manycore Systems.Neil A. Butcher, Stephen L. Olivier, Peter M. Kogge
2018ICPPOptimizing for KNL Usage Modes When Data Doesn't Fit in MCDRAM.Neil Butcher, Stephen L. Olivier, Jonathan W. Berry, Simon D. Hammond, Peter M. Kogge
2017SCA Case for Migrating Execution for Irregular Applications.Peter M. Kogge, Shannon K. Kuntz
2016SCHighly Scalable Near Memory Processing with Migrating Threads on the Emu System Architecture.Timothy J. Dysart, Peter M. Kogge, Martin M. Deneroff, Eric Bovell, Preston Briggs, Jay B. Brockman, Kenneth Jacobsen, Yujen Juan, Shannon K. Kuntz, Richard A. Lethin, Janice O. McMahon, Chandra Pawar, Martin Perrigo, Sarah Rucker, John Ruttenberg, Max Ruttenberg, Steve Stein
2011SCUsing the TOP500 to trace and project technology and architecture trends.Peter M. Kogge, Timothy J. Dysart
2008DACDesign of a mask-programmable memory/multiplier array using G4-FET technology.Jay B. Brockman, Sheng Li, Peter M. Kogge, Amit Kashyap, Mohammad M. Mojarradi
2007SPAAEvaluating synchronization techniques for light-weight multithreaded/multicore architectures.Srinivas Sridharan, Arun Rodrigues, Peter M. Kogge
2006CLUSTERFine-Grained Message Pipelining for Improved MPI Performance.Arun Rodrigues, Kyle B. Wheeler, Peter M. Kogge, Keith D. Underwood
2006PDPTAFacing up to the Inevitable: Intelligent Error Recovery in Massively Parallel Processing in Memory Architectures.James F. Kramer, Matthias Scheutz, Jay B. Brockman, Peter M. Kogge
2006SCM06 - Issues for the future of supercomputing: impact of Moore's law and architecture on application performance.Erik DeBenedictis, David E. Keyes, Peter M. Kogge
2006SCPoster reception - The structural simulation toolkit: exploring novel architectures.Arun Rodrigues, Richard C. Murphy, Peter M. Kogge, Keith D. Underwood
2006SCMulti-core issues - Multi-Core for HPC: breakthrough or breakdown?Thomas L. Sterling, Peter M. Kogge, William J. Dally, Steve Scott, William Gropp, David E. Keyes, Peter H. Beckman
2005ICSThe implications of working set analysis on supercomputing memory hierarchy design.Richard C. Murphy, Arun Rodrigues, Peter M. Kogge, Keith D. Underwood
2004DACQuantum-Dot Cellular Automata (QCA) circuit partitioning: problem modeling and solutions.Dominic A. Antonelli, Danny Z. Chen, Timothy J. Dysart, Xiaobo Sharon Hu, Andrew B. Kahng, Peter M. Kogge, Richard C. Murphy, Michael T. Niemier
2004ICCDUsing Circuits and Systems-Level Research to Drive Nanotechnology.Michael T. Niemier, Ramprasad Ravichandran, Peter M. Kogge
2004ICSCharacterizing a new class of threads in scientific applications for high end supercomputers.Arun Rodrigues, Richard C. Murphy, Peter M. Kogge, Keith D. Underwood
2004ISPASSCache implications of aggressively pipelined high performance microprocessors.Timothy J. Dysart, Branden J. Moore, Lambert Schaelicke, Peter M. Kogge
2003CLUSTERImplications of a PIM Architectural Model for MPI.Arun Rodrigues, Richard C. Murphy, Peter M. Kogge, Jay B. Brockman, Ron Brightwell, Keith D. Underwood
2003HPCAThe State of State.Peter M. Kogge
2002WCAETeaching students computer architecture for new, nanotechnologies.Michael Thaddeus Niemier, Peter M. Kogge
2001ISCAExploring and exploiting wire-level pipelining in emerging technologies.Michael T. Niemier, Peter M. Kogge
2001ISLPEDEnergy: efficient instruction dispatch buffer design for superscalar processors.Gurhan Kucuk, Kanad Ghose, Dmitry Ponomarev, Peter M. Kogge
2001SODAPolygonal path approximation with angle constraints.Danny Z. Chen, Ovidiu Daescu, John Hershberger, Peter M. Kogge, Jack Snoeyink
2000DACA design of and design tools for a novel quantum dot based microprocessor.Michael T. Niemier, Michael J. Kontz, Peter M. Kogge
2000ISLPEDOptimization of high-performance superscalar architectures for energy efficiency.Victor V. Zyuban, Peter M. Kogge
1999ICSMicroservers: a new memory semantics for massively parallel computing.Jay B. Brockman, Peter M. Kogge, Thomas L. Sterling, Vincent W. Freeh, Shannon K. Kuntz
1999SCMapping Irregular Applications to DIVA, a PIM-based Data-Intensive Architecture.Mary W. Hall, Peter M. Kogge, Jefferey G. Koller, Pedro C. Diniz, Jacqueline Chame, Jeff Draper, Jeff LaCoss, John J. Granacki, Jay B. Brockman, Apoorv Srivastava, William C. Athas, Vincent W. Freeh, Jaewook Shin, Joonseok Park
1998ISLPEDThe energy complexity of register files.Victor V. Zyuban, Peter M. Kogge
1994ICPPEXECUBE - A New Architecture for Scalable MPPs.Peter M. Kogge
1977ISCAThe Microprogramming of Pipelined Processors.Peter M. Kogge
1973ISCAMaximal Rate Pipelined Solutions to Recurrance Problems.Peter M. Kogge