Pierpaolo Palestri
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
5
Venues
1
Active years
2004–2020
Best venue rank
C
Where they publish
Papers
5 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2020 | ISCAS | An Energy-Efficient Low-Voltage Swing Transceiver for mW-Range IoT End-Nodes. | Hayate Okuhara, Ahmed Elnaqib, Davide Rossi, Alfio Di Mauro, Philipp Mayer, Pierpaolo Palestri, Luca Benini |
| 2018 | ISCAS | Design of a half-rate receiver for a 10Gbps automotive serial interface with 1-tap-unrolled 4-taps DFE and custom CDR algorithm. | Andrea Bandiziol, Werner Grollitsch, Francesco Brandonisio, Matteo Bassi, Roberto Nonis, Pierpaolo Palestri |
| 2018 | ISCAS | Sub-mW multi-Gbps chip-to-chip communication Links for Ultra-Low Power IoT end-nodes. | Martino Dazzi, Pierpaolo Palestri, Davide Rossi, Andrea Bandiziol, Igor Loi, David E. Bellasi, Luca Benini |
| 2008 | ISCAS | Design of UWB LNA in 45nm CMOS technology: Planar bulk vs. FinFET. | Davide Ponton, Pierpaolo Palestri, David Esseni, Luca Selmi, Marc Tiebout, Bertrand Parvais, Gerhard Knoblinger |
| 2004 | ISCAS | Modeling, design and characterization of a new low jitter analog dual tuning LC-VCO PLL architecture. | Roberto Nonis, Nicola Da Dalt, Pierpaolo Palestri, Luca Selmi |