| 2014 | DSD | Virtual Devices for Hot-Pluggable Processors. | Pierre Bomel, Kevin J. M. Martin, Jean-Philippe Diguet |
| 2013 | DSD | Parallel Deadlock Detection and Recovery for Networks-on-Chip Dedicated to Diffused Computations. | Pierre Bomel, Marc Sevaux |
| 2012 | MODELS | Functional validation of AADL models via model transformation to SystemC with ATL. | Pierre Bomel, Dominique Blouin, Mickael Lanoe, Eric Senn |
| 2008 | ISPDC | Bitstreams Repository Hierarchy for FPGA Partially Reconfigurable Systems. | Pierre Bomel, Jean-Philippe Diguet, Guy Gogniat, Jrmie Crenne |
| 2005 | DATE | Synchronization Processor Synthesis for Latency Insensitive Systems. | Pierre Bomel, Eric Martin, Emmanuel Boutillon |
| 2005 | DSD | Hardware Virtual Components Compliant with Communication System Standards. | Nabil Abdelli, Pierre Bomel, Emmanuel Casseau, Anne-Marie Fouilliart, Christophe Jgo, Philippe Kajfasz, Bertrand Le Gal, Nathalie Le Heno |
| 2005 | DSD | High-Level Synthesis in Latency Insensitive System Methodology. | Pierre Bomel, Nabil Abdelli, Eric Martin, Anne-Marie Fouilliart, Emmanuel Boutillon, Philippe Kajfasz |
| 2005 | ICASSP | A more efficient and flexible DSP design flow from Matlab-Simulink [FFT algorithm example]. | Philippe Coussy, Gwenol Corre, Pierre Bomel, Eric Senn, Eric Martin |
| 2005 | ISCAS | High-level synthesis under I/O timing and memory constraints. | Philippe Coussy, Gwenol Corre, Eric Senn, Pierre Bomel, Eric Martin |