Po-Chang Wu
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
3
Venues
3
Active years
2014–2020
Best venue rank
A*
Where they publish
Papers
3 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2020 | DAC | Late Breaking Results: Automatic Adaptive MOM Capacitor Cell Generation for Analog and Mixed-Signal Layout Design. | Tzu-Wei Wang, Po-Chang Wu, Mark Po-Hung Lin |
| 2015 | HPCC | Efficient Parallel Muti-pattern Matching Using GPGPU Acceleration for Packet Filtering. | Che-Lun Hung, Po-Chang Wu, Hsiao-Hsi Wang, Chun-Yuan Lin |
| 2014 | ISCAS | 5-GHz SiGe linearity power amplifier using integrated feedforward architecture for WLAN applications. | Kuei-Cheng Lin, Hwann-Kaeo Chiou, Po-Chang Wu, Hann-Huei Tsai, Ying-Zong Juang |