Purushottam Vamsi Nagendra
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
1
Venues
1
Active years
2024–2024
Best venue rank
C
Where they publish
Papers
1 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2024 | CIT | Enhancing Digital Circuit Efficiency with Memristor-CMOS Hybrid Technology. | Lakshmi Sowjanya Koneru, Sunkara Baby Usha, Purushottam Vamsi Nagendra, Sammeta Urvasi Mani |