Pushpanjali Mallik
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
1
Venues
1
Active years
2014–2014
Best venue rank
C
Where they publish
Papers
1 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2014 | CIT | Half-Perimeter Wirelength Model for VLSI Analytical Placement. | B. N. Bhramar Ray, Alok Ranjan Tripathy, Pralipta Samal, Manimay Das, Pushpanjali Mallik |