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Rahul R. Patil

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

1

Venues

1

Active years

2016–2016

Best venue rank

C

Where they publish

Papers

1 indexed papers, newest first.

YearVenueTitleAuthors
2016ISCASIntra mode power saving methodology for CGRA-based reconfigurable processor architectures.Narasinga Rao Miniskar, Rahul R. Patil, Raj Narayana Gadde, Young-chul Rams Cho, Sukjin Kim, Shi Hwa Lee