Rahul Yamasani
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
1
Venues
1
Active years
2016–2016
Best venue rank
A
Where they publish
Papers
1 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2016 | HPDC | LUT Optimization In Implementation Of Combinational Karatsuba Ofman On Virtex-6 FPGA. | Deepak Kapoor, Rahul Yamasani, Saket Saurav, Abhishek Bajpai |