Rajshekhar Mukherjee
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
1
Venues
1
Active years
2025–2025
Best venue rank
C
Where they publish
Papers
1 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2025 | ISCAS | A 40 Gb/s Adaptive CTLE Using a Sub-Sampled PAM-4 Clock Recovery Circuit in 65nm CMOS. | Alok Kumar, Ishan Mishra, Tejavanth Kothani, Rajshekhar Mukherjee, Midhun V, Shalabh Gupta |