Refik Sever
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
3
Venues
2
Active years
2004–2010
Best venue rank
C
Where they publish
Papers
3 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2010 | ISCAS | 88-Bit multiplier designed with a new wave-pipelining scheme. | Refik Sever, Murat Askar |
| 2004 | DSD | A High Speed FPGA Implementation of the Rijndael Algorithm. | Refik Sever, A. Neslin Ismailoglu, Yusuf agatay Tekmen, Murat Askar, Burak Okcan |
| 2004 | ISCAS | A high speed ASIC implementation of the Rijndael algorithm. | Refik Sever, A. Neslin Ismailoglu, Yusuf agatay Tekmen, Murat Askar |