Richard Veras
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
6
Venues
6
Active years
2012–2023
Best venue rank
A*
Where they publish
Papers
6 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2023 | IWANN | Observe Locally, Classify Globally: Using GNNs to Identify Sparse Matrix Structure. | Khaled Abdelaal, Richard Veras |
| 2019 | SC | Analytical cache modeling and tilesize optimization for tensor contractions. | Rui Li, Aravind Sukumaran-Rajam, Richard Veras, Tze Meng Low, Fabrice Rastello, Atanas Rountev, P. Sadayappan |
| 2016 | PPoPP | Compilers, hands-off my hands-on optimizations. | Richard Veras, Doru-Thom Popovici, Tze Meng Low, Franz Franchetti |
| 2013 | ICS | A stencil compiler for short-vector SIMD architectures. | Thomas Henretty, Richard Veras, Franz Franchetti, Louis-Nol Pouchet, J. Ramanujam, P. Sadayappan |
| 2013 | PLDI | When polyhedral transformations meet SIMD code generation. | Martin Kong, Richard Veras, Kevin Stock, Franz Franchetti, Louis-Nol Pouchet, P. Sadayappan |
| 2012 | ISCA | RAIDR: Retention-aware intelligent DRAM refresh. | Jamie Liu, Ben Jaiyen, Richard Veras, Onur Mutlu |