S. Turgis
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
3
Venues
2
Active years
1995–1997
Best venue rank
A
Where they publish
Papers
3 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 1997 | DATE | Internal power modelling and minimization in CMOS inverters. | S. Turgis, Jean Michel Daga, Josep M. Portal, Daniel Auvergne |
| 1996 | DATE | Design and selection of buffers for minimum power-delay product. | S. Turgis, Nadine Azmard, Daniel Auvergne |
| 1995 | ISLPED | Explicit evaluation of short circuit power dissipation for CMOS logic structures. | S. Turgis, Nadine Azmard, Daniel Auvergne |