Sai Phaneendra Parlapalli
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
2
Venues
1
Active years
2017–2017
Best venue rank
C
Where they publish
Papers
2 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2017 | RC | Optimizing the Reversible Circuits Using Complementary Control Line Transformation. | Sai Phaneendra Parlapalli, Chetan Kumar Vudadha, M. B. Srinivas |
| 2017 | RC | An ESOP Based Cube Decomposition Technique for Reversible Circuits. | Sai Phaneendra Parlapalli, Chetan Kumar Vudadha, M. B. Srinivas |