| 2012 | ICCAD | Circuit reliability: From Physics to Architectures: Embedded tutorial paper. | Jianxin Fang, Saket Gupta, Sanjay V. Kumar, Sravan K. Marella, Vivek Mishra, Pingqiang Zhou, Sachin S. Sapatnekar |
| 2012 | ICCAD | A holistic analysis of circuit timing variations in 3D-ICs with thermal and TSV-induced stress considerations. | Sravan K. Marella, Sanjay V. Kumar, Sachin S. Sapatnekar |
| 2009 | ASPDAC | Adaptive techniques for overcoming performance degradation due to aging in digital circuits. | Sanjay V. Kumar, Chris H. Kim, Sachin S. Sapatnekar |
| 2008 | DAC | A framework for block-based timing sensitivity analysis. | Sanjay V. Kumar, Chandramouli V. Kashyap, Sachin S. Sapatnekar |
| 2007 | DAC | NBTI-Aware Synthesis of Digital Circuits. | Sanjay V. Kumar, Chris H. Kim, Sachin S. Sapatnekar |
| 2006 | ASPDAC | Mathematically assisted adaptive body bias (ABB) for temperature compensation in gigascale LSI systems. | Sanjay V. Kumar, Chris H. Kim, Sachin S. Sapatnekar |
| 2006 | ICCAD | An analytical model for negative bias temperature instability. | Sanjay V. Kumar, Chris H. Kim, Sachin S. Sapatnekar |