Sayeef S. Salahuddin
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
8
Venues
4
Active years
2008–2026
Best venue rank
A*
Where they publish
Papers
8 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2026 | ASPDAC | Scalable Optimization with GIS-PIM: A Generalized Integer-State Probabilistic Ising Machine. | Chirag Garg, Sayeef S. Salahuddin |
| 2020 | ISCAS | Dynamic Memory and Sequential Logic Design using Negative Capacitance FinFETs. | Ramin Rajaei, Yen-Kai Lin, Sayeef S. Salahuddin, Michael T. Niemier, Xiaobo Sharon Hu |
| 2020 | ISLPED | GC-eDRAM design using hybrid FinFET/NC-FinFET. | Ramin Rajaei, Yen-Kai Lin, Sayeef S. Salahuddin, Michael T. Niemier, Xiaobo Sharon Hu |
| 2017 | DAC | In Quest of the Next Information Processing Substrate: Extended Abstract: Invited. | Suman Datta, Alan C. Seabaugh, Michael T. Niemier, Arijit Raychowdhury, Darrell Schlom, Debdeep Jena, Huili Grace Xing, H.-S. Philip Wong, Eric Pop, Sayeef S. Salahuddin, Sumeet Kumar Gupta, Supratik Guha |
| 2017 | ISLPED | Full chip power benefits with negative capacitance FETs. | Sandeep Kumar Samal, Sourabh Khandelwal, Asif Islam Khan, Sayeef S. Salahuddin, Chenming Hu, Sung Kyu Lim |
| 2016 | DAC | Nonvolatile memory design based on ferroelectric FETs. | Sumitha George, Kaisheng Ma, Ahmedullah Aziz, Xueqing Li, Asif Islam Khan, Sayeef S. Salahuddin, Meng-Fan Chang, Suman Datta, John Sampson, Sumeet Kumar Gupta, Vijaykrishnan Narayanan |
| 2010 | ISLPED | Analysis of thermal behaviors of spin-torque-transfer RAM: a simulation study. | Subho Chatterjee, Sayeef S. Salahuddin, Satish Kumar, Saibal Mukhopadhyay |
| 2008 | DAC | Modeling of failure probability and statistical design of spin-torque transfer magnetic random access memory (STT MRAM) array for yield enhancement. | Jing Li, Charles Augustine, Sayeef S. Salahuddin, Kaushik Roy |