| 2010 | VTC | Architectural Analysis of a Smart DMA Controller for Protocol Stack Acceleration in LTE Terminals. | Sebastian Hessel, David Szczesny, Felix Bruns, Attila Bilgic, Josef Hausner |
| 2010 | RTCSA | Optimizing the Processing Performance of a Smart DMA Controller for LTE Terminals. | David Szczesny, Sebastian Hessel, Shadi Traboulsi, Attila Bilgic |
| 2009 | GLOBECOM | Implementation and Benchmarking of Hardware Accelerators for Ciphering in LTE Terminals. | Sebastian Hessel, David Szczesny, Nils Lohmann, Attila Bilgic, Josef Hausner |
| 2008 | Mobisys | Acceleration of the L4/Fiasco microkernel using scratchpad memory. | Sebastian Hessel, Felix Bruns, Attila Bilgic, Adam Lackorzynski, Hermann Hrtig, Josef Hausner |
| 2007 | DATE | Low power design on algorithmic and architectural level: a case study of an HSDPA baseband digital signal processing system. | Marcus Schmann, Sebastian Hessel, Ulrich Langmann, Martin Bcker |
| 2006 | VTC | Channel Equalization in HSDPA Receivers: Trade-Off between Performance and Complexity with a Variable Oversampling. | Marcus Schmann, Martin Bcker, Sebastian Hessel, Ulrich Langmann |