| 2011 | ASPDAC | Selectively patterned masks: Structured ASIC with asymptotically ASIC performance. | Donkyu Baek, Insup Shin, Seungwhun Paik, Youngsoo Shin |
| 2011 | ASPDAC | Pulser gating: A clock gating of pulsed-latch circuits. | Sangmin Kim, Inhak Han, Seungwhun Paik, Youngsoo Shin |
| 2011 | ICCAD | Implementation of pulsed-latch and pulsed-register circuits to minimize clocking power. | Seungwhun Paik, Gi-Joon Nam, Youngsoo Shin |
| 2010 | ASPDAC | Statistical time borrowing for pulsed-latch circuit designs. | Seungwhun Paik, Lee-eun Yu, Youngsoo Shin |
| 2010 | ASPDAC | Bounded potential slack: enabling time budgeting for dual-Vt allocation of hierarchical design. | Jun Seomun, Seungwhun Paik, Youngsoo Shin |
| 2010 | ISLPED | Wakeup synthesis and its buffered tree construction for power gating circuit designs. | Seungwhun Paik, Sangmin Kim, Youngsoo Shin |
| 2009 | DAC | Register allocation for high-level synthesis using dual supply voltages. | Insup Shin, Seungwhun Paik, Youngsoo Shin |
| 2009 | DATE | HLS-l: High-level synthesis of high performance latch-based circuits. | Seungwhun Paik, Insup Shin, Youngsoo Shin |
| 2009 | ICCAD | Retiming and time borrowing: Optimizing high-performance pulsed-latch-based circuits. | Seonggwan Lee, Seungwhun Paik, Youngsoo Shin |
| 2008 | ASPDAC | Statistical mixed Vt allocation of body-biased circuits for reduced leakage variation. | Jinseob Jeong, Seungwhun Paik, Youngsoo Shin |
| 2008 | DAC | Multiobjective optimization of sleep vector for zigzag power-gated circuits in standard cell elements. | Seungwhun Paik, Youngsoo Shin |
| 2008 | ICCAD | Pulse width allocation with clock skew scheduling for optimizing pulsed latch-based sequential circuits. | Hyein Lee, Seungwhun Paik, Youngsoo Shin |