Shao-Hui Shieh
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
2
Venues
2
Active years
2004–2007
Best venue rank
C
Where they publish
Papers
2 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2007 | DDECS | A Low-Power High-Speed Hybrid CMOS Full Adder for Embedded System. | Chiou-Kou Tung, Yu-Cherng Hung, Shao-Hui Shieh, Guo-Shing Huang |
| 2004 | ISCAS | A novel radix-4 bit-level modular multiplier for fast RSA cryptosystem. | Jin-Hua Hong, Bin-Yan Tsai, Liang-Te Lu, Shao-Hui Shieh |