| 2010 | ISIT | Worst configurations (instantons) for Compressed Sensing over reals: A channel coding approach. | Shashi Kiran Chilappagari, Michael Chertkov, Bane Vasic |
| 2010 | ISIT | Multilevel decoders surpassing belief propagation on the binary symmetric channel. | Shiva Kumar Planjery, David Declercq, Shashi Kiran Chilappagari, Bane Vasic |
| 2010 | ITA | Iterative decoding beyond belief propagation. | Shiva Kumar Planjery, Shashi Kiran Chilappagari, Bane Vasic, David Declercq, Ludovic Danjean |
| 2010 | ITW | Structured LDPC codes from permutation matrices free of small trapping sets. | Dung Viet Nguyen, Bane Vasic, Michael W. Marcellin, Shashi Kiran Chilappagari |
| 2009 | ISIT | Two-bit message passing decoders for LDPC codes over the binary symmetric channel. | Shashi Kiran Chilappagari, David Declercq, Lucile Sassatelli, Bane Vasic |
| 2009 | ISIT | Analysis of error floors of LDPC codes under LP decoding over the BSC. | Shashi Kiran Chilappagari, Bane Vasic, Mikhail G. Stepanov, Michael Chertkov |
| 2008 | ISIT | On the guaranteed error correction capability of LDPC codes. | Shashi Kiran Chilappagari, Dung Viet Nguyen, Bane Vasic, Michael W. Marcellin |
| 2008 | ITW | LDPC codes which can correct three errors under iterative decoding. | Shashi Kiran Chilappagari, Anantha Raman Krishnan, Bane Vasic |
| 2007 | ISIT | Designing LDPC Codes without small trapping sets by using Tanner Graph Covers. | Milos Ivkovic, Shashi Kiran Chilappagari, Bane Vasic |
| 2006 | GLOBECOM | Construction of Memory Circuits Using Unreliable Components Based on Low-Density Parity-Check Codes. | Milos Ivkovic, Shashi Kiran Chilappagari, Bane Vasic |
| 2006 | ISIT | Analysis of One Step Majority Logic Decoders Constructed From Faulty Gates. | Shashi Kiran Chilappagari, Milos Ivkovic, Bane Vasic |