Silvia M. Mller
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
7
Venues
4
Active years
1999–2021
Best venue rank
A*
Where they publish
Papers
7 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2021 | ISCA | Energy Efficiency Boost in the AI-Infused POWER10 Processor. | Brian W. Thompto, Dung Q. Nguyen, Jos E. Moreira, Ramon Bertran, Hans M. Jacobson, Richard J. Eickemeyer, Rahul M. Rao, Michael Goulet, Marcy Byers, Christopher J. Gonzalez, Karthik Swaminathan, Nagu R. Dhanwada, Silvia M. Mller, Andreas Wagner, Satish Kumar Sadasivam, Robert K. Montoye, William J. Starke, Christian G. Zoellin, Michael S. Floyd, Jeffrey Stuecheli, Nandhini Chandramoorthy, John-David Wellman, Alper Buyuktosunoglu, Matthias Pflanz, Balaram Sinharoy, Pradip Bose |
| 2011 | ARITH | The POWER7 Binary Floating-Point Unit. | Maarten Boersma, Michael Kroener, Christophe Layer, Petra Leber, Silvia M. Mller, Kerstin Schelm |
| 2011 | ARITH | The IBM zEnterprise-196 Decimal Floating-Point Accelerator. | Steven R. Carlough, Adam Collura, Silvia M. Mller, Michael Kroener |
| 2005 | ARITH | Pain versus Gain in the Hardware Design of FPUs and Supercomputers. | Roger A. Golliver, Silvia M. Mller, Stuart F. Oberman, Martin S. Schmookler, Debjit Das Sarma, Andrew Beaumont-Smith |
| 2005 | ARITH | The Vector Floating-Point Unit in a Synergistic Processor Element of a CELL Processor. | Silvia M. Mller, Christian Jacobi, Hwa-Joon Oh, Kevin D. Tran, Scott R. Cottier, Brad W. Michael, Hiroo Nishikawa, Yonetaro Totsuka, Tatsuya Namatame, Naoka Yano, Takashi Machida, Sang H. Dhong |
| 2000 | EuroPar | Parallel Computer Architecture. | Silvia M. Mller, Per Stenstrm, Mateo Valero, Stamatis Vassiliadis |
| 1999 | SPAA | On the Scheduling of Variable Latency Functional Units. | Silvia M. Mller |