| 2025 | ISCAS | A 4.21 TFLOPS/W Memory-Efficient LLM Inference Accelerator with Bit-Layered Non-Uniform Quantization. | Byeongcheol Kim, Sangjin Kim, Sangwoo Ha, Soyeon Um, Kyomin Sohn, Hoi-Jun Yoo |
| 2025 | ISCAS | A 32.65m | Jingu Lee, Sangwoo Ha, Sunjoo Whang, Soyeon Kim, Sangjin Kim, Soyeon Um, Wooyoung Jo, Hoi-Jun Yoo |
| 2025 | ISCAS | A 62.8 TOPS/W FP-INT Digital Computing-in Memory Processor with Bit-Reordered Adder Tree and Low Active Hierarchical Accumulator. | Sunjoo Whang, Sangwoo Ha, Soyeon Um, Sangjin Kim, Hoi-Jun Yoo |
| 2024 | ISCAS | Two-Step Spike Encoding Scheme and Architecture for Highly Sparse Spiking-Neural-Network. | Sangyeob Kim, Sangjin Kim, Soyeon Um, Soyeon Kim, Hoi-Jun Yoo |
| 2023 | ISCAS | A 332 TOPS/W Input/Weight-Parallel Computing-in-Memory Processor with Voltage-Capacitance-Ratio Cell and Time-Based ADC. | Seongyon Hong, Soyeon Um, Sangjin Kim, Sangyeob Kim, Wooyoung Jo, Hoi-Jun Yoo |
| 2023 | ISCAS | A Reconfigurable 1T1C eDRAM-based Spiking Neural Network Computing-In-Memory Processor for High System-Level Efficiency. | Seryeong Kim, Soyeon Kim, Soyeon Um, Sangjin Kim, Zhiyong Li, Sangyeob Kim, Wooyoung Jo, Hoi-Jun Yoo |
| 2023 | ISCAS | A 5.99 TFLOPS/W Heterogeneous CIM-NPU Architecture for an Energy Efficient Floating-Point DNN Acceleration. | Wonhoon Park, Junha Ryu, Sangjin Kim, Soyeon Um, Wooyoung Jo, Sangyoeb Kim, Hoi-Jun Yoo |
| 2022 | ISCAS | A 161.6 TOPS/W Mixed-mode Computing-in-Memory Processor for Energy-Efficient Mixed-Precision Deep Neural Networks. | Wooyoung Jo, Sangjin Kim, Juhyeong Lee, Soyeon Um, Zhiyong Li, Hoi-Jun Yoo |