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Sravan K. Marella

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

5

Venues

2

Active years

2012–2017

Best venue rank

A*

Where they publish

Papers

5 indexed papers, newest first.

YearVenueTitleAuthors
2017DACIncorporating the Role of Stress on Electromigration in Power Grids with Via Arrays.Vivek Mishra, Palkesh Jain, Sravan K. Marella, Sachin S. Sapatnekar
2015ICCADOptimization of FinFET-based circuits using a dual gate pitch technique.Sravan K. Marella, Amit Ranjan Trivedi, Saibal Mukhopadhyay, Sachin S. Sapatnekar
2013ICCADThe impact of shallow trench isolation effects on circuit performance.Sravan K. Marella, Sachin S. Sapatnekar
2012ICCADCircuit reliability: From Physics to Architectures: Embedded tutorial paper.Jianxin Fang, Saket Gupta, Sanjay V. Kumar, Sravan K. Marella, Vivek Mishra, Pingqiang Zhou, Sachin S. Sapatnekar
2012ICCADA holistic analysis of circuit timing variations in 3D-ICs with thermal and TSV-induced stress considerations.Sravan K. Marella, Sanjay V. Kumar, Sachin S. Sapatnekar