Srini W. Seetharam
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
4
Venues
2
Active years
1993–1995
Best venue rank
C
Where they publish
Papers
4 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 1995 | HPDC | A High Speed Implementation of Adaptive Shaping for Dynamic Bandwidth Allocation. | Cameron Braun, Vinai Sirkay, Hugo Uriona, Srini W. Seetharam, Esmaell Yousefi, David W. Petr, Douglas Niehaus, Victor Frost, Joseph B. Evans, Gary J. Minden |
| 1994 | ISCAS | A Single Chip Implementation of Receive Path Termination for SONET OC-12c and Quadruple SONET OC-3c. | Srini W. Seetharam, Gary J. Minden, Joseph B. Evans |
| 1994 | ISCAS | A Pipelined Architecture to Map ATM Cells to 622 Mb/s SONET OC-12 Payloads. | Srini W. Seetharam, Gary J. Minden, Joseph B. Evans |
| 1993 | ISCAS | A Parallel SONET Scrambler/Descrambler Architecture. | Srini W. Seetharam, Gary J. Minden, Joseph B. Evans |