| 2019 | GLOBECOM | Decoding Flash Memory with Progressive Reads and Independent vs. Joint Encoding of Bits in a Cell. | Nathan Wong, Ethan Liang, Haobo Wang, Sudarsan V. S. Ranganathan, Richard D. Wesel |
| 2018 | GLOBECOM | Serial List Viterbi Decoding with CRC: Managing Errors, Erasures, and Complexity. | Hengjie Yang, Sudarsan V. S. Ranganathan, Richard D. Wesel |
| 2018 | ISIT | Linear Rate-Compatible Codes with Degree-1 Extending Variable Nodes Under Iterative Decoding. | Sudarsan V. S. Ranganathan, Richard D. Wesel, Dariush Divsalar |
| 2017 | ISIT | Design of improved quasi-cyclic protograph-based Raptor-like LDPC codes for short block-lengths. | Sudarsan V. S. Ranganathan, Dariush Divsalar, Richard D. Wesel |
| 2017 | ISIT | Approaching capacity using incremental redundancy without feedback. | Haobo Wang, Sudarsan V. S. Ranganathan, Richard D. Wesel |
| 2017 | ISIT | An information density approach to analyzing and optimizing incremental redundancy with feedback. | Haobo Wang, Nathan Wong, Alexander M. Baldauf, Christopher K. Bachelor, Sudarsan V. S. Ranganathan, Dariush Divsalar, Richard D. Wesel |
| 2017 | ITA | Sequential differential optimization of incremental redundancy transmission lengths: An example with tail-biting convolutional codes. | Nathan Wong, Kasra Vakilinia, Haobo Wang, Sudarsan V. S. Ranganathan, Richard D. Wesel |
| 2016 | ITA | Some results on spatially coupled protograph LDPC codes. | Sudarsan V. S. Ranganathan, Kasra Vakilinia, Lara Dolecek, Dariush Divsalar, Richard D. Wesel |
| 2015 | ISIT | On the girth of (3, L) quasi-cyclic LDPC codes based on complete protographs. | Sudarsan V. S. Ranganathan, Dariush Divsalar, Richard D. Wesel |