| 2026 | ISCAS | Verification of Quantum Fourier Transform and Its Inverse via Rotational and Superposition Abstraction. | Arun Govindankutty, Sudarshan K. Srinivasan, Yusuf Moshood |
| 2026 | ISCAS | Invulnerability Checking for Memory Protection Extensions Against Meltdown. | Yusuf Moshood, Sudarshan K. Srinivasan, Nimish Mathure, Arun Govindankutty |
| 2024 | ISCAS | Formal Verification For Cyclic Quantum Walk Circuits. | Benedicto James Sitou Campbell, Sudarshan K. Srinivasan |
| 2019 | ISCAS | An Equivalence Verification Methodology for Asynchronous Sleep Convention Logic Circuits. | Mousam Hossain, Ashiq A. Sakib, Sudarshan K. Srinivasan, Scott C. Smith |
| 2014 | ICCD | Equivalence verification for NULL Convention Logic (NCL) circuits. | Vidura Wijayasekara, Sudarshan K. Srinivasan, Scott C. Smith |
| 2013 | MEMOCODE | Equivalence checking for synchronous elastic circuits. | Vidura Wijaysekara, Sudarshan K. Srinivasan |
| 2011 | FMCAD | Desynchronization: design for verification. | Sudarshan K. Srinivasan, Raj S. Katti |
| 2010 | ISCAS | Joint optimal placement of PMU and conventional measurements in power systems. | Rajesh Kavasseri, Sudarshan K. Srinivasan |
| 2009 | ISCAS | Efficient Hardware Implementation of a New Pseudo-random Bit Sequence Generator. | Raj S. Katti, Sudarshan K. Srinivasan |
| 2009 | ISCAS | Verification of Desynchronized Circuits. | Sudarshan K. Srinivasan, Raj S. Katti |
| 2007 | CAV | BAT: The Bit-Level Analysis Tool. | Panagiotis Manolios, Sudarshan K. Srinivasan, Daron Vroon |
| 2006 | DATE | Monolithic verification of deep pipelines with collapsed flushing. | Roma Kane, Panagiotis Manolios, Sudarshan K. Srinivasan |
| 2006 | ICCAD | Automatic memory reductions for RTL model verification. | Panagiotis Manolios, Sudarshan K. Srinivasan, Daron Vroon |
| 2005 | DATE | Refinement Maps for Efficient Verification of Processor Models. | Panagiotis Manolios, Sudarshan K. Srinivasan |
| 2005 | ICCAD | Verification of executable pipelined machines with bit-level interfaces. | Panagiotis Manolios, Sudarshan K. Srinivasan |
| 2005 | ICCAD | A complete compositional reasoning framework for the efficient verification of pipelined machines. | Panagiotis Manolios, Sudarshan K. Srinivasan |
| 2005 | MEMOCODE | A computationally ef~cient method based on commitment re~nement maps for verifying pipelined machines. | Panagiotis Manolios, Sudarshan K. Srinivasan |
| 2004 | DATE | Automatic Verification of Safety and Liveness for XScale-Like Processor Models Using WEB Refinements. | Panagiotis Manolios, Sudarshan K. Srinivasan |
| 2003 | MEMOCODE | Formal Verification of an Intel XScale Processor Model with Scoreboarding, Specialized Execution Pipelines, and Impress Data-Memory Exceptions. | Sudarshan K. Srinivasan, Miroslav N. Velev |