Suhas Shivapakash
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
1
Venues
1
Active years
2020–2020
Best venue rank
C
Where they publish
Papers
1 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2020 | ISCAS | A Power Efficient Multi-Bit Accelerator for Memory Prohibitive Deep Neural Networks. | Suhas Shivapakash, Hardik Jain, Olaf Hellwich, Friedel Gerfers |