Suresh Cheemalavagu
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
2
Venues
2
Active years
1982–2006
Best venue rank
A
Where they publish
Papers
2 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2006 | DATE | Ultra-efficient (embedded) SOC architectures based on probabilistic CMOS (PCMOS) technology. | Lakshmi N. Chakrapani, Bilge Saglam Akgul, Suresh Cheemalavagu, Pinar Korkmaz, Krishna V. Palem, Balasubramanian Seshasayee |
| 1982 | RTSS | Analysis and Simulation of Banyan Interconnection Networks with 2x2, 4x4 and 8x8 Switching Elements. | Suresh Cheemalavagu, Miroslaw Malek |