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Sushil Sakhare

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

5

Venues

4

Active years

2015–2019

Best venue rank

A*

Where they publish

Papers

5 indexed papers, newest first.

YearVenueTitleAuthors
2019DACProcess, Circuit and System Co-optimization of Wafer Level Co-Integrated FinFET with Vertical Nanosheet Selector for STT-MRAM Applications.Trong Huynh Bao, Anabela Veloso, Sushil Sakhare, Philippe Matagne, Julien Ryckaert, Manu Perumkunnil, Davide Crotti, Farrukh Yasin, Alessio Spessot, Arnaud Furnmont, Gouri Sankar Kar, Anda Mocuta
2019ICCDA Comparative Analysis on the Impact of Bank Contention in STT-MRAM and SRAM Based LLCs.Timon Evenblij, Christian Tenllado, Manu Perumkunnil, Francky Catthoor, Sushil Sakhare, Peter Debacker, Gouri Sankar Kar, Arnaud Furnmont, Nicolas Bueno, Jos Ignacio Gmez Prez
2018DATEMain memory organization trade-offs with DRAM and STT-MRAM options based on gem5-NVMain simulation frameworks.Manu Komalan, Oh Hyung Rock, Matthias Hartmann, Sushil Sakhare, Christian Tenllado, Jos Ignacio Gmez, Gouri Sankar Kar, Arnaud Furnmont, Francky Catthoor, Sophiane Senni, David Novo, Abdoulaye Gamati, Lionel Torres
2017ISCASCross-layer design and analysis of a low power, high density STT-MRAM for embedded systems.Manu Komalan, Sushil Sakhare, Trong Huynh Bao, Siddharth Rao, Woojin Kim, Christian Tenllado, Jos Ignacio Gmez, Gouri Sankar Kar, Arnaud Furnmont, Francky Catthoor
2015DATEImpact of interconnect multiple-patterning variability on SRAMs.Ioannis Karageorgos, Michele Stucchi, Praveen Raghavan, Julien Ryckaert, Zsolt Tokei, Diederik Verkest, Rogier Baert, Sushil Sakhare, Wim Dehaene