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Takahiro Irita

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

5

Venues

4

Active years

1998–2009

Best venue rank

A*

Where they publish

Papers

5 indexed papers, newest first.

YearVenueTitleAuthors
2009ASPDACA 65nm dual-mode baseband and multimedia application processor SoC with advanced power and memory management.Tatsuya Kamei, Tetsuhiro Yamada, Takao Koike, Masayuki Ito, Takahiro Irita, Kenichi Nitta, Toshihiro Hattori, Shinichi Yoshioka
2006DACHierarchical power distribution and power management scheme for a single chip mobile processor.Toshihiro Hattori, Takahiro Irita, Masayuki Ito, Eiji Yamamoto, Hisashi Kato, Go Sado, Tetsuhiro Yamada, Kunihiko Nishiyama, Hiroshi Yagi, Takao Koike, Yoshihiko Tsuchihashi, Motoki Higashida, Hiroyuki Asano, Izumi Hayashibara, Ken Tatezawa, Yasuhisa Shimazaki, Naozumi Morino, Yoshihiko Yasu, Tadashi Hoshi, Yujiro Miyairi, Kazumasa Yanagisawa, Kenji Hirose, Saneaki Tamaki, Shinichi Yoshioka, Toshifumi Ishii, Yusuke Kanno, Hiroyuki Mizuno, Tetsuya Yamada, Naohiko Irie, Reiko Tsuchihashi, Nobuto Arai, Tomohiro Akiyama, Koji Ohno
2005ISCASSH-mobile - low power application processor for cellular [3G cellular phones].Shoichi Kamae, Takahiro Irita, Akifumi Tsukimori, Saneaki Tarnaki, Toshihiro Hattori, Shinichi Yoshioka
1998KESGeneration of chaos with simple sets of semiconductor devices.Koichiro Hoh, Takahiro Irita, Teppei Tsujita, Minoru Fujishima
1998KESSelf-oscillating chaos generator using CMOS multivibrator.Teppei Tsujita, Takahiro Irita, Minoru Fujishima, Koichiro Hoh