Takeo Yasuda
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
7
Venues
2
Active years
2000–2023
Best venue rank
C
Where they publish
Papers
7 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2023 | ISCAS | Architectures and Circuits for Analog-memory-based Hardware Accelerators for Deep Neural Networks (Invited). | Hsinyu Tsai, Pritish Narayanan, Shubham Jain, Stefano Ambrogio, Kohji Hosokawa, Masatoshi Ishii, Charles Mackin, Ching-Tzu Chen, Atsuya Okazaki, Akiyo Nomura, Irem Boybat, Ramachandran Muralidhar, Martin M. Frank, Takeo Yasuda, Alexander M. Friz, Yasuteru Kohda, An Chen, Andrea Fasoli, Malte J. Rasch, Stanislaw Wozniak, Jose Luquin, Vijay Narayanan, Geoffrey W. Burr |
| 2022 | ISCAS | Analog-memory-based 14nm Hardware Accelerator for Dense Deep Neural Networks including Transformers. | Atsuya Okazaki, Pritish Narayanan, Stefano Ambrogio, Kohji Hosokawa, Hsinyu Tsai, Akiyo Nomura, Takeo Yasuda, Charles Mackin, Alexander M. Friz, Masatoshi Ishii, Yasuteru Kohda, Katie Spoon, An Chen, Andrea Fasoli, Malte J. Rasch, Geoffrey W. Burr |
| 2005 | ISCAS | On-chip temperature sensor with high tolerance for process and temperature variation. | Takeo Yasuda |
| 2003 | ASPDAC | A low power CMOS circuit with Variable Souce Scheme (VSCMOS). | Takeo Yasuda, Kohji Hosokawa |
| 2001 | ASPDAC | A dynamically phase adjusting PLL with a variable delay. | Takeo Yasuda, Hiroaki Fujita, Hidetoshi Onodera |
| 2001 | ISCAS | A power-on reset pulse generator for low voltage applications. | Takeo Yasuda, Masaaki Yamamoto, Takafumi Nishi |
| 2000 | ISCAS | High-speed wide-locking range VCO with frequency calibration. | Takeo Yasuda |