Tetsu Kobayashi
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
1
Venues
1
Active years
2015–2015
Best venue rank
B
Where they publish
Papers
1 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2015 | ICPP | Efficient Use of Hardware Transactional Memory for Parallel Mesh Generation. | Tetsu Kobayashi, Shigeyuki Sato, Hideya Iwasaki |