Thomas Piquet
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
2
Venues
2
Active years
2009–2009
Best venue rank
A
Where they publish
Papers
2 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2009 | ICS | Zero-content augmented caches. | Julien Dusser, Thomas Piquet, Andr Seznec |
| 2009 | RTSS | Using Bypass to Tighten WCET Estimates for Multi-Core Processors with Shared Instruction Caches. | Damien Hardy, Thomas Piquet, Isabelle Puaut |