| 2026 | ASPDAC | ANIMo: Accelerating Nested Isolation with Monitor-free Domain Transition. | Yibin Xu, Han Wang, Yue Jin, Tianyi Huang, Tianyue Lu, Mingyu Chen |
| 2026 | CCGRID | S-MSHR: A Scalable MSHR Architecture Using Cache Tag Data-Ready Bits and Index Queues. | Shuang Wu, Xu Zhang, Yibin Xu, Yangyang Zhao, Tianyue Lu, Mingyu Chen |
| 2025 | ICCD | DASICS: Efficient In-Process Protection with Hardware-Assisted Dynamic Compartmentalization. | Yue Jin, Yibin Xu, Han Wang, Chengyuan Zhang, Tianyi Huang, Tianyue Lu, Mingyu Chen |
| 2023 | CCGRID | Rethinking Design Paradigm of Graph Processing System with a CXL-like Memory Semantic Fabric. | Xu Zhang, Yisong Chang, Tianyue Lu, Ke Zhang, Mingyu Chen |
| 2023 | DATE | MARB: Bridge the Semantic Gap between Operating System and Application Memory Access Behavior. | Haifeng Li, Ke Liu, Ting Liang, Zuojun Li, Tianyue Lu, Yisong Chang, Hui Yuan, Yinben Xia, Yungang Bao, Mingyu Chen, Yizhou Shan |
| 2023 | HPCA | HoPP: Hardware-Software Co-Designed Page Prefetching for Disaggregated Memory. | Haifeng Li, Ke Liu, Ting Liang, Zuojun Li, Tianyue Lu, Hui Yuan, Yinben Xia, Yungang Bao, Mingyu Chen, Yizhou Shan |
| 2023 | ICCD | Morpheus: An Adaptive DRAM Cache with Online Granularity Adjustment for Disaggregated Memory. | Xu Zhang, Tianyue Lu, Yisong Chang, Ke Zhang, Mingyu Chen |
| 2021 | DATE | LSP: Collective Cross-Page Prefetching for NVM. | Haiyang Pan, Yuhang Liu, Tianyue Lu, Mingyu Chen |
| 2019 | HPCC | Characterizations and Architectural Implications of NVM's External DRAM Cache. | Haiyang Pan, Yuhang Liu, Tianyue Lu, Mingyu Chen |
| 2019 | ICPADS | Make Page Coloring more Efficient on Slice-Based Three-Level Cache. | Haifeng Li, Tianyue Lu, Yuhang Liu, Mingyu Chen |
| 2017 | ICCD | TDV Cache: Organizing Off-Chip DRAM Cache of NVMM from a Fusion Perspective. | Tianyue Lu, Yuhang Liu, Haiyang Pan, Mingyu Chen |
| 2017 | ISPA | Fine-Grained Data Committing for Persistent Memory. | Tianyue Lu, Yuhang Liu, Mingyu Chen |
| 2014 | DATE | Achieving efficient packet-based memory system by exploiting correlation of memory requests. | Tianyue Lu, Licheng Chen, Mingyu Chen |