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Tom Eeckelaert

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

6

Venues

2

Active years

2003–2007

Best venue rank

A*

Where they publish

Papers

6 indexed papers, newest first.

YearVenueTitleAuthors
2007DATEAn efficient methodology for hierarchical synthesis of mixed-signal systems with fully integrated building block topology selection.Tom Eeckelaert, Raf Schoofs, Georges G. E. Gielen, Michiel Steyaert, Willy M. C. Sansen
2006DACHierarchical bottom--up analog optimization methodology validated by a delta-sigma A/D converter design for the 802.11a/b/g standard.Tom Eeckelaert, Raf Schoofs, Georges G. E. Gielen, Michiel Steyaert, Willy M. C. Sansen
2005DACPerformance space modeling for hierarchical synthesis of analog integrated circuits.Georges G. E. Gielen, Trent McConaghy, Tom Eeckelaert
2005DATEEfficient Multiobjective Synthesis of Analog Circuits using Hierarchical Pareto-Optimal Performance Hypersurfaces.Tom Eeckelaert, Trent McConaghy, Georges G. E. Gielen
2005DATECAFFEINE: Template-Free Symbolic Model Generation of Analog Circuits via Canonical Form Functions and Genetic Programming.Trent McConaghy, Tom Eeckelaert, Georges G. E. Gielen
2003DATEGeneralized Posynomial Performance Modeling.Tom Eeckelaert, Walter Daems, Georges G. E. Gielen, Willy M. C. Sansen