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Trong Huynh Bao

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

2

Venues

2

Active years

2017–2019

Best venue rank

A*

Where they publish

Papers

2 indexed papers, newest first.

YearVenueTitleAuthors
2019DACProcess, Circuit and System Co-optimization of Wafer Level Co-Integrated FinFET with Vertical Nanosheet Selector for STT-MRAM Applications.Trong Huynh Bao, Anabela Veloso, Sushil Sakhare, Philippe Matagne, Julien Ryckaert, Manu Perumkunnil, Davide Crotti, Farrukh Yasin, Alessio Spessot, Arnaud Furnmont, Gouri Sankar Kar, Anda Mocuta
2017ISCASCross-layer design and analysis of a low power, high density STT-MRAM for embedded systems.Manu Komalan, Sushil Sakhare, Trong Huynh Bao, Siddharth Rao, Woojin Kim, Christian Tenllado, Jos Ignacio Gmez, Gouri Sankar Kar, Arnaud Furnmont, Francky Catthoor