Tuo-Yu Yao
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
1
Venues
1
Active years
2009–2009
Best venue rank
C
Where they publish
Papers
1 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2009 | ISCAS | Low-power 7.2 GHz Complementary All-N-Transistor Logic using 90 nm CMOS Technology. | Chia-Hao Hsu, Gang-Neng Sung, Tuo-Yu Yao, Chun-Ying Juan, Yain-Reu Lin, Chua-Chin Wang |