Tzu-Hsuan Hsu
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
4
Venues
3
Active years
2013–2021
Best venue rank
C
Where they publish
Papers
4 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2021 | ISCAS | Design of Computing-in-Memory (CIM) with Vertical Split-Gate Flash Memory for Deep Neural Network (DNN) Inference Accelerator. | Hang-Ting Lue, Han-Wen Hu, Tzu-Hsuan Hsu, Po-Kai Hsu, Keh-Chung Wang, Chih-Yuan Lu |
| 2014 | ISLPED | Buffered clock tree synthesis considering self-heating effects. | Chung-Wei Lin, Tzu-Hsuan Hsu, Xin-Wei Shih, Yao-Wen Chang |
| 2013 | ASPDAC | Symmetrical buffered clock-tree synthesis with supply-voltage alignment. | Xin-Wei Shih, Tzu-Hsuan Hsu, Hsu-Chieh Lee, Yao-Wen Chang, Kai-Yuan Chao |
| 2013 | ISCAS | Using condition flag prediction to improve the performance of out-of-order processors. | Tzu-Hsuan Hsu, Ching-Wen Lin, Chung-Ho Chen |