U. Fat Chio
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
4
Venues
1
Active years
2004–2013
Best venue rank
C
Where they publish
Papers
4 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2013 | ISCAS | A 0.6V 8b 100MS/s SAR ADC with minimized DAC capacitance and switching energy in 65nm CMOS. | Wen-Lan Wu, Yan Zhu, Li Ding, Chi-Hang Chan, U. Fat Chio, Sai-Weng Sin, Seng-Pan U., Rui Paulo Martins |
| 2010 | ISCAS | A voltage feedback charge compensation technique for split DAC architecture in SAR ADCs. | Yan Zhu, Chi-Hang Chan, U. Fat Chio, Sai-Weng Sin, Seng-Pan U., Rui Paulo Martins |
| 2008 | ISCAS | A power scalable 6-bit 1.2GS/s flash ADC with power on/off Track-and-Hold and preamplifier. | He Gong Wei, U. Fat Chio, Sai-Weng Sin, Seng-Pan U., Rui Paulo Martins |
| 2004 | ISCAS | A C-less ASK demodulator for implantable neural interfacing chips. | Chua-Chin Wang, Ya-Hsin Hsueh, U. Fat Chio, Yu-Tzu Hsiao |