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Ulrich Ramacher

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

11

Venues

7

Active years

1993–2011

Best venue rank

A*

Where they publish

Papers

11 indexed papers, newest first.

YearVenueTitleAuthors
2011ISCASArchitecture and implementation of a Software-Defined Radio baseband processor.Ulrich Ramacher, Wolfgang Raab, J. A. Ulrich Hachmann, Dominik Langen, Jrg Berthold, R. Kramer, A. Schackow, Cyprian Grassmann, Mirko Sauermann, P. Szreder, F. Capar, G. Obradovic, W. Xu, Nico Brls, Kang Lee, Eugene Weber, Ray Kuhn, John Harrington
2007ICCDChallenges and prospects of SDR for mobile phones.Ulrich Ramacher
2005DACWireless platforms: GOPS for cents and MilliWatts.Francine Bacchini, Jan M. Rabaey, Allan Cox, Frank Lane, Rudy Lauwereins, Ulrich Ramacher, David Witt
2005ICANNTemporal Sound Processing by Cochlear Nucleus Octopus Neurons.Werner Hemmert, Marcus Holmberg, Ulrich Ramacher
2005InterspeechAutomatic speech recognition with neural spike trains.Marcus Holmberg, David Gelbart, Ulrich Ramacher, Werner Hemmert
2004IPASCellular pulse-coupled neural network with adaptive weights for image segmentation and its VLSI implementation.Jrg Schreiter, Ulrich Ramacher, Arne Heittmann, Daniel Matolin, Ren Schffny
2002ICANNAn Analog VLSI Pulsed Neural Network for Image Segmentation Using Adaptive Connection Weights.Arne Heittmann, Ulrich Ramacher, Daniel Matolin, Jrg Schreiter, Ren Schffny
2002ICCDApplication Specific Embedded Processors for Next Generation Communication Systems.Ulrich Ramacher
2001DATECrosstalk noise in future digital CMOS circuits.Chr. Werner, Ralf Goettsche, A. Wrner, Ulrich Ramacher
1996ICANNSEE-1 - A Vision System for Use in Real World Environments.Ulrich Ramacher
1993ISCASArchitecture and VLSI Design of a VLSI Neural Signal Processor.Ulrich Ramacher, Jrg Beichter, Nico Brls, Elisabeth Sicheneder