Vaibhavi Mathur
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
1
Venues
1
Active years
2021–2021
Best venue rank
C
Where they publish
Papers
1 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2021 | DSD | Cache-accel: FPGA Accelerated Cache Simulator with Partially Reconfigurable Prefetcher. | Shivani Shah, Vaibhavi Mathur, Sahithi Meenakshi Vutakuru, Kavya Borra, Nanditha P. Rao |