| 2020 | SOFA | A Tale of Catalan Triangles: Counting Lattice Paths. | Leonard Daus, Marilena Jianu, Roxana-Mariana Beiu, Valeriu Beiu |
| 2020 | SOFA | Consecutive Systems Asymptotic Threshold Behaviors. | Vlad-Florin Dragoi, Valeriu Beiu |
| 2018 | SOFA | On Posets for Reliability: How Fine Can They Be? | Valeriu Beiu, Simon Robin Cowell, Vlad-Florin Dragoi |
| 2016 | SOFA | Novel Method for Neurodegenerative Disorders Screening Patients Using Hurst Coefficients on EEG Delta Rhythm. | Roxana Toderean, Oana Geman, Iuliana Chiuchisan, Valentina Emilia Balas, Valeriu Beiu |
| 2011 | IJCNN | Exploring retrograde signaling via astrocytes as a mechanism for self repair. | John J. Wade, Liam McDaid, Jim Harkin, Vincenzo Crunelli, J. A. Scott Kelso, Valeriu Beiu |
| 2008 | ISCAS | Does the brain really outperform Rent's rule? | Valeriu Beiu, Walid Ibrahim |
| 2007 | IWANN | What von Neumann Did Not Say About Multiplexing Beyond Gate Failures - The Gory Details. | Valeriu Beiu, Walid Ibrahim, Sanja Lazarova-Molnar |
| 2006 | AICCSA | Femto Joule Switching for Nano Electronics. | Valeriu Beiu, Jabulani Nyathi, Snorre Aunet, Mawahib H. Sulieman |
| 2006 | AICCSA | Multiplexing Schemes in Single-Electron Technology. | Mawahib H. Sulieman, Valeriu Beiu |
| 2005 | IJCNN | Ultra low power fault tolerant neural inspired CMOS logic. | Snorre Aunet, Valeriu Beiu |
| 2005 | IJCNN | On Kolmogorov's superpositions: novel gates and circuits for nanoelectronics? | Valeriu Beiu, Artur Zawadzki |
| 2005 | IWANN | Ultra Low-Power Neural Inspired Addition: When Serial Might Outperform Parallel Architectures. | Valeriu Beiu, Asbjrn Djupdal, Snorre Aunet |
| 2005 | IWANN | Using Kolmogorov Inspired Gates for Low Power Nanoelectronics. | Valeriu Beiu, Artur Zawadski, Razvan Andonie, Snorre Aunet |
| 2004 | IJCNN | A charge recycling differential noise immune perceptron. | Jabulani Nyathi, Valeriu Beiu, Suryanarayana Tatapudi, David J. Betowski |
| 2004 | ISCAS | Characterization of a 16-bit threshold logic single-electron technology adder. | Mawahib H. Sulieman, Valeriu Beiu |
| 2003 | ICANN | Constructive Threshold Logic Addition A Synopsis of the Last Decade. | Valeriu Beiu |
| 2003 | ICANN | Review of Capacitive Threshold Gate Implementations. | Valeriu Beiu, Maria J. Avedillo, Jos M. Quintana |
| 2003 | IJCNN | Fuzzy ARTMAP with relevance factor. | Razvan Andonie, Lucian M. Sasu, Valeriu Beiu |
| 2003 | IJCNN | A survey of perceptron circuit complexity results. | Valeriu Beiu |
| 2003 | IWANN | Split-Precharge Differential Noise-Immune Threshold Logic Gate (SPD-NTL). | Suryanarayana Tatapudi, Valeriu Beiu |
| 1999 | IWANN | Neural Addition and Fibonacci Numbers. | Valeriu Beiu |
| 1997 | IWANN | Tight Bounds on the Size of Neural Networks for Classification Problems. | Valeriu Beiu, Thierry de Pauw |
| 1995 | IWANN | Optimal Mapping of Neural Networks onto FPGA's - A New Constructive Algorithm -. | Valeriu Beiu, John G. Taylor |
| 1994 | ESANN | VLSI complexity reduction by piece-wise approximation of the sigmoid function. | Valeriu Beiu, J. A. Peperstraete, Joos Vandewalle, Rudy Lauwereins |
| 1993 | ESANN | Efficient decomposition of comparison and its applications. | Valeriu Beiu, J. A. Peperstraete, Joos Vandewalle, Rudy Lauwereins |