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Vanchinathan Venkataramani

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

9

Venues

6

Active years

2013–2020

Best venue rank

A*

Where they publish

Papers

9 indexed papers, newest first.

YearVenueTitleAuthors
2020DATEUnified Thread- and Data-Mapping for Multi-Threaded Multi-Phase Applications on SPM Many-Cores.Vanchinathan Venkataramani, Anuj Pathania, Tulika Mitra
2020ICASSPTime-Predictable Software-Defined Architecture with Sdf-Based Compiler Flow for 5g Baseband Processing.Vanchinathan Venkataramani, Bruno Bodin, Aditi Kulkarni Mohite, Tulika Mitra, Li-Shiuan Peh
2020RTCSASimultaneous Progressing Switching Protocols for Timing Predictable Real-Time Network-on-Chips.Niklas Ueter, Jian-Jia Chen, Georg von der Brggen, Vanchinathan Venkataramani, Tulika Mitra
2016CASESLOCUS: low-power customizable many-core architecture for wearables.Cheng Tan, Aditi Kulkarni Mohite, Vanchinathan Venkataramani, Manupa Karunaratne, Tulika Mitra, Li-Shiuan Peh
2016DACDistributed scheduling for many-cores using cooperative game theory.Anuj Pathania, Vanchinathan Venkataramani, Muhammad Shafique, Tulika Mitra, Jrg Henkel
2016DATEDistributed fair scheduling for many-cores.Anuj Pathania, Vanchinathan Venkataramani, Muhammad Shafique, Tulika Mitra, Jrg Henkel
2014ICCDDesign space exploration of multiple loops on FPGAs using high level synthesis.Guanwen Zhong, Vanchinathan Venkataramani, Yun Liang, Tulika Mitra, Smal Niar
2013CASESPower-performance modeling on asymmetric multi-cores.Mihai Pricopi, Thannirmalai Somu Muthukaruppan, Vanchinathan Venkataramani, Tulika Mitra, Sanjay Vishin
2013DACHierarchical power management for asymmetric multi-core in dark silicon era.Thannirmalai Somu Muthukaruppan, Mihai Pricopi, Vanchinathan Venkataramani, Tulika Mitra, Sanjay Vishin