| 2019 | SMC | Fall Detection on a single Doppler Radar Sensor by using Convolutional Neural Networks. | Haruka Yoshino, Vasily G. Moshnyaga, Koji Hashimoto |
| 2017 | SMC | The use of thermal ir array sensor for indoor fall detection. | Akira Hayashida, Vasily G. Moshnyaga, Koji Hashimoto |
| 2016 | SMC | A medication adherence monitoring system for people with dementia. | Vasily G. Moshnyaga, Masaki Koyanagi, Fumiyuki Hirayama, Akihisa Takahama, Koji Hashimoto |
| 2014 | ICSEng | A Smart Carpet Design for Monitoring People with Dementia. | Osamu Tanaka, Toshin Ryu, Akira Hayashida, Vasily G. Moshnyaga, Koji Hashimoto |
| 2012 | ICASSP | A low-power FPGA implementation of eye tracking. | Tomoaki Ando, Vasily G. Moshnyaga, Koji Hashimoto |
| 2011 | DSD | Embedded System for Camera-Based TV Power Reduction. | Choong Geun Lee, Vasily G. Moshnyaga, Koji Hashimoto |
| 2011 | ISCAS | TV energy management by camera-based viewer monitoring. | Choong Geun Lee, Vasily G. Moshnyaga |
| 2010 | ETRA | The use of eye tracking for PC energy management. | Vasily G. Moshnyaga |
| 2009 | SMC | Algorithm Optimizations for Low-Complexity Eye Tracking. | Vasily G. Moshnyaga, Shinji Yamamoto |
| 2008 | DSD | A Hardware Design for Camera-Based Power Management of Computer Monitor. | Vasily G. Moshnyaga, Koji Hashimoto, Tadashi Suetsugu |
| 2008 | SMC | A hardware design of camera-based user's presence detector. | Vasily G. Moshnyaga, Koji Hashimoto, Tadashi Suetsugu |
| 2007 | ISCAS | Reducing Energy of DRAM/Flash Memory System by OS-controlled Data Refresh. | Vasily G. Moshnyaga, Hua Vo, Glenn Reinman, Miodrag Potkonjak |
| 2006 | ISCAS | Reducing computations in MPEG2 video decoder. | Vasily G. Moshnyaga, Kenji Wakisaka |
| 2006 | ISCAS | MPEG complexity reduction by scene adaptive motion estimation. | Vasily G. Moshnyaga, S. Yamaoka |
| 2005 | ICCD | LCD Display Energy Reduction by User Monitoring. | Vasily G. Moshnyaga, Eiji Morikawa |
| 2004 | ISCAS | A data reusing architecture for MPEG video coding. | Vasily G. Moshnyaga, Koichi Masunaga, Naoki Kajiwara |
| 2004 | ISCAS | Reducing multiplier energy by data-driven voltage variation. | Tomoyuki Yamanaka, Vasily G. Moshnyaga |
| 2003 | ISCAS | Dynamic operand transformation for low-power multiplier-accumulator design. | Masayoshi Fujino, Vasily G. Moshnyaga |
| 2002 | ICASSP | Reduction of memory accesses in motion estimation by block-data reuse. | Vasily G. Moshnyaga |
| 2002 | ICCD | A Low Energy Set-Associative I-Cache with Extended BTB. | Koji Inoue, Vasily G. Moshnyaga, Kazuaki J. Murakami |
| 2002 | ISLPED | A history-based I-cache for low-energy multimedia applications. | Koji Inoue, Vasily G. Moshnyaga, Kazuaki J. Murakami |
| 2002 | ISLPED | Reducing energy consumption of video memory by bit-width compression. | Vasily G. Moshnyaga, Koji Inoue, Mizuka Fukagawa |
| 2001 | ASPDAC | Reducing cache engery through dual voltage supply. | Vasily G. Moshnyaga |
| 2001 | ISCAS | Cache energy reduction by dual voltage supply. | Vasily G. Moshnyaga, Hiroshi Tsuji |
| 2001 | ISLPED | Energy reduction in queues and stacks by adaptive bitwidth compression. | Vasily G. Moshnyaga |
| 2000 | ICASSP | An architectural enhancement for reducing background computation in adaptive motion estimation. | Vasily G. Moshnyaga, Kazuhito Nakasima |
| 2000 | ISCAS | Reduction of background computations in adaptive block-matching motion estimation. | Vasily G. Moshnyaga, Kazuhito Nakasima |
| 1999 | ICASSP | An adaptive block-matching algorithm for motion estimation. | Vasily G. Moshnyaga |
| 1999 | ISCAS | A new architecture for computationally adaptive full-search block-matching motion estimation. | Vasily G. Moshnyaga |
| 1999 | ISCAS | An MSB truncation scheme for low-power video processors. | Vasily G. Moshnyaga |
| 1998 | ICASSP | A new architecture for in-memory image convolution. | Vasily G. Moshnyaga, Kazuhiro Suzuki, Keikichi Tamaru |
| 1997 | ICASSP | A memory efficient array architecture for full-search block matching algorithm. | Vasily G. Moshnyaga, Keikichi Tamaru |
| 1995 | ASPDAC | A scheduling algorithm for synthesis of bus-partitioned architectures. | Vasily G. Moshnyaga, Fumiaki Ohbayashi, Keikichi Tamaru |
| 1995 | ISCAS | A Comparative Study of Switching Activity Reduction Techniques for Design of Low-Power Multipliers. | Vasily G. Moshnyaga, Keikichi Tamaru |
| 1993 | ICCAD | Layout-driven module selection for register-transfer synthesis of sub-micron ASIC's. | Vasily G. Moshnyaga, Hiroshi Mori, Hidetoshi Onodera, Keikichi Tamaru |