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Viacheslav V. Fedorov

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

1

Venues

1

Active years

2014–2014

Best venue rank

C

Where they publish

Papers

1 indexed papers, newest first.

YearVenueTitleAuthors
2014ICCDAn area-efficient Ternary CAM design using floating gate transistors.Viacheslav V. Fedorov, Monther Abusultan, Sunil P. Khatri